Project 2 - Development of TFT Cluster Speedometer Software Component

1.

LCD based TFT cluster has become a defacto standard in today's automotive market.Cluster comes with a 7 inch LCD screen and a 32 bit microcontroller.The cluster is capable of processing various information from other ECUs and and display the same in its large TFT LCD screen.All Cluster Instruments receive signals from other ECUs via CAN bus interface.Commands are also received from the Driver via steering wheel buttons.The signals are processed by the Cluster ECU after which the Cluster ECU may send vehicle information to the LCD or light the LED and so forth according to the results.Hence Cluster ECU can be regarded as a carrier of information flow.

The model has been developed and enclosed as TFT.slx.

Basically this has four functional requirements.

Average Vehicle Speed will be displayed only if it is between 2 kmph and 250 kmph.Any value outside this range will be discarded by its lower limit and upper limit.

When Average Vehicle Speed is < 2 kmph,Display Speed=2 kmph.

When Average Vehicle Speed is in between 2 kmph and 250 kmph Display Speed=Average Vehicle Speed.

When Average Vehicle Speed is > 250 kmph,Display Speed=250 kmph.

This set of requirements is implemented using the saturation block. The signal Avg_Veh_Speed is passed through the saturation block which is configured to have upper limit of 250 and lower limit of 2. The output of the saturation block is the signal Out_VehSpd_Display.

A Simulink Data Dictionary file has been created and attached with the model.This is enclosed herewith as TFTDD.sldd.The procedure of creating Data Dictionary is as under.

In the Simulink Editor, on the Modeling tab, under Design, Link to Data Dictionary.is clicked In the Model Properties dialog box, Then 'New' is clicked to create a data dictionary. TFTDD name was given to the data dictionary, It is saved by clicking the 'Apply' button..

For requirement tagging by right clicking the Subsystem 'Link to MS Word' option was chosen while the TFT_req document was kept open.The same is enclosed herewith.

For checking model compliance as per JMAAB 'Model Advisor' icon was clicked and then ticking appropriate boxes the checking was carried out .The report has been enclosed in TFT_JMAAB_Rep.It is clear that out of 106 checks 99 have been passed and 7 received warnings. Moreover, there is no failed test.

Next Design Verifier checking was done.At first APPS tab was clicked and then 'Design Verifier' was selected. Checking for design errors was carried out using the Green play button.The result has been enclosed as TFT_DV_Result.In the next step ,test generation was done using the Design Verifier tool.The test generation coverage was set to MCDC and other settings were left at default.The report is enclosed as TFT_DV_Report.It is seen that altogether 16 objectives have been processed and all of these are satisfied.

Before going in for Model In Loop(MIL) testing we need to take care of some configuration settings such as enabling Coverage and setting Coverage metrics to MCDC.

For testing purpose a Test Harness is needed.This was created by clicking on the Subsystem in the model and selecting 'Test Harness' from the context menu.This opens a Dialog Box from where we can select the input and output of the component or model under test,.Here we have selected Signal Biulder for the input and 'To Workspace' block for the output.The harness is enclosed as TFT_Harness2.

The Coverage Report generated after testing is enclosed as TFT_Cov_MIL.The model was run for a total time of 1 sec with Fixed Step(Discrete) Solver with sample time of 0.01 sec.The output from test was compared with the calculated value using Data Inspector tool.A screenshot is also enclosed vide TFT_Milshot.

The Test Cases are also provided vide Excel sheets TFT_Tst and TFT_Tst2 attached herewith.

The Software in Loop(SIL) is performed by making another Test Harness.In SIL we actually code the model instead of the Simulink blocks.

The method of Test Harness creation is same as that of MIL harness, but with the following two differences:

First, the top model is made Atomic Subsystem from the Subsystem Parameters dialog box.

Secondly, we go to the advance section and select Software In Loop(SIL).

The Coverage Report is enclosed as TFT_SIL_Cov and the screenshot as TFT_SILshot.

To generate C code for the model we use the Embedded Coder App within MATLAB.But prior to that we need to adjust the Code Generation settings in the model configurator.The target file is set to ert.tlc which represents embedded real time coder.Now we load the Embedded Coder app and select Generate Code under Build.This generates C code in new folder ending with 'ert_tw' in the current working directory.

Polyspace is a static code analysis tool that uses the formal methods to prove the absence of critical run time errors under all possible control flows and data.

To run Polyspace Analysis in the MATLAB Coder App the following procedure is followed:

1. I. At first we generate standalone C/C++ code (a static library, dynamically linked library, or executable program).
2. II.Then on the Generate Code page, click Polyspace.
3. III.After this we need to select the appropriate option like Polyspace Code Prover vide Configure Advanced Polyspace Options in MATLAB Coder App..
4. IV.Finally 'Run' is clicked.
5. An error message is generated wherein it is observed that Polyspace is not installed or linked with MATLAB.The screenshot of this message has been enclosed herewith as TFT_Polyspace.
7. The following step by step approach is followed for performing the Baseline testing.

8. I.The model is opened.Next APPS icon was chosen and 'Simulink Test' is clicked.

   II.Then 'Simulink Test Manager' is clicked.This causes opening of a Dialog Box.

   III.Under the REQUIREMENTS tag at first ADD is clicked,then link EDITOR is clicked.Next in the Dialog Box 'New' is clicked, document type was chosen to be 'Requirement Set'.The file is browsed and 'Apply' & 'OK' were ticked.

   IV.Under the 'System Under Testing' the model is opened and the Subsystem is selected.Next 'Simulation' is selected and 'Model Settings' is clicked.

   V.Under INPUTS the option CREATE is clicked.

   VI.An Excel file Input-data is created and the same is linked by browsing.

   VII.Mapping of Input data was done.

   VIII.Then mapping of Baseline data is required to be done

   IX.Enable Coverage has to be ticked.

   X.'Decision' is required to be chosen as the Coverage Matrix.

   XI.After this all the settings are needed to be saved by Right clicking on the model and using the 'Save' option.

   XII.Next the 'Run' button has to be clicked to get the results.

   The test result is attached as TFT_Baseline_shot1.It shows 50% decision coverage and 100% execution..

   For back to back testing the following step by step approach is adopted.

   I.The model is opened and the Subsystem is selected.

   II,The APP tab was clicked and Simulink Test tab was chosen from Model Verification,Validation & Test section.

   III.Next 'Simulink Test Manager' was clicked.

   IV.Then New>Test for Model Component was clicked.

   V.To specify the top model Use Current Model button next to the Top Model field was clicked.Then 'Use Currently selected components' was clicked.

   VI.Then 'Next' was clicked and 'Component input from Test Model' was used as Test Input.

   VII.'Next' was clicked to select the Testing Method.Also 'Perform Back to Back Testing' was ticked.

   VII.For Simulation 1 'Normal' was selected while for Simulation 2 'SIL' was selected.

   VIII.'Next' was clicked.For specifying the file format EXCEL was chosen and for specifying the location to save test data default location name was used.

   IX.Then 'Done' was clicked.The Test Harness and Test Cases are created and the wizard closes.

   X.To run the back to back testing 'Run' button was clicked.

9. The building process was interrupted due to an error.The Test Manager report is enclosed as TFT_b2berror while the screenshot from MATLAB Command Window is enclosed as TFT_b2berror1.It is obvious that the building process stopped due to presence of two files having same file name in the list of source files.