Project 1 - Wiper control system and Vehicle speed calculation for ABS using Wheel Speed sensor
Develop the Simulink model based on the given descriptions for the below challenges and also create SLDD file and link the same to the model. Perform the complete V and V workflow for the obtained models.
- Wiper control system
Develop Simulink/state flow model for wiper control system based on the given conditions.
Description of Challenge:
- If the density of the rain is low, then wiper rotates with low speed & the output signal should be 100rpm
- If the density of the rain is medium, then wiper rotates with medium speed & the output signal should be 200rpm
- If the density of the rain is high, then wiper rotates with high speed & the output signal should be 500rpm
Note: Rain density input comes from the external sensor, for the simulation purpose constant block with knob can be taken.
Ans:
Wiper control system :
Aim : Develop Simulink/state Flow Modules For Wiper Control System Based on the Given Conditions
Description of Challenge :
1. If the density of the rain is low, then wiper rotates with low speed, the output signal should be 100rpm.
2. If the density of the rain is medium, then wiper rotates with low speed, the output signal should be 200rpm.
3. If the density of the rain is high, then wiper rotates with low speed, the output signal should be 500rpm.
1) Model Development :
Subsystem :
No Rain Subsystem :
Low Rain Susystem :
Medium Rain Subsystem :
High Rain Subsystem :
2) Simulink Data Dictionary (SLDD) :
3) Requirement Tagging :
Create the Functional and SwReq File into the xls. File.
4) Model Advisor (JMAAB) :
Going to the Simulink Model >> Click on the Modelling >> Model Advisor.
5) Fixed Point Tool :
Run thee Model Error Free >> and then Click on the Fixed Point Tool >> Iterative Fixed-Point Conversion.
6) SLDV Design Error Detection and Test GenerationReport :
Goto the Model >> Open the Design Verifier App >> Select the Design Error Detection >> then Click on Design Error Detection Setting.
MIL and SIL Harness - Coverage:
BaseLine Test:
Back to Back:
Code Generation:
/*
* Event Support License -- for demonstration use and event support. Not
* for government, research, commercial, or other organizational use.
*
* File: Wiper_Control.c
*
* Code generated for Simulink model 'Wiper_Control'.
*
* Model version : 1.3
* Simulink Coder version : 9.7 (R2022a) 13-Nov-2021
* C/C++ source code generated on : Fri Mar 3 19:30:41 2023
*
* Target selection: ert.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
* Code generation objectives: Unspecified
* Validation result: Not run
*/
#include "Wiper_Control.h"
/* External outputs (root outports fed by signals with default storage) */
ExtY_Wiper_Control_T Wiper_Control_Y;
/* Real-time model */
static RT_MODEL_Wiper_Control_T Wiper_Control_M_;
RT_MODEL_Wiper_Control_T *const Wiper_Control_M = &Wiper_Control_M_;
/* Model step function */
void Wiper_Control_step(void)
{
/* (no output/update code required) */
}
/* Model initialize function */
void Wiper_Control_initialize(void)
{
/* ConstCode for Outport: '/No_Rain' */
Wiper_Control_Y.No_Rain = Wiper_Control_ConstB.Switch;
/* ConstCode for Outport: '/Low_Rain' */
Wiper_Control_Y.Low_Rain = Wiper_Control_ConstB.Switch_c;
/* ConstCode for Outport: '/Medium_Rain' */
Wiper_Control_Y.Medium_Rain = Wiper_Control_ConstB.Switch_h;
/* ConstCode for Outport: '/High_Rain' */
Wiper_Control_Y.High_Rain = Wiper_Control_ConstB.Switch_cm;
}
/* Model terminate function */
void Wiper_Control_terminate(void)
{
/* (no terminate code required) */
}
/*
* File trailer for generated code.
*
* [EOF]
*/
2.Vehicle speed calculation for ABS using Wheel Speed sensor
Develop Simulink/state flow model for the vehicle speed calculation unit inside the ABS system for the below conditions.
Description of Challenge:
fl, fr, rl and rr are the wheel speeds of front left, front right, rear left and rear right respectively.
Ans:
Simulink Model:
SLDD:
Fixed Tool:
SIL & MIL Harness and Coverage:
Test Generation And Error Detection:
Requirement Tagging:
JMAAB:
BaseLine and B2B Test:
Code Generation:
/*
* Event Support License -- for demonstration use and event support. Not
* for government, research, commercial, or other organizational use.
*
* File: ABSFINAL.c
*
* Code generated for Simulink model 'ABSFINAL'.
*
* Model version : 3.2
* Simulink Coder version : 9.7 (R2022a) 13-Nov-2021
* C/C++ source code generated on : Sat Mar 4 11:32:30 2023
*
* Target selection: ert.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
* Code generation objectives: Unspecified
* Validation result: Not run
*/
#include "ABSFINAL.h"
#include "rtwtypes.h"
#include "ABSFINAL_private.h"
/* Exported data definition */
/* Definition for custom storage class: ExportToFile */
uint16_T Speed; /* '<S2>/Multiport Switch' */
/* Real-time model */
static RT_MODEL_ABSFINAL_T ABSFINAL_M_;
RT_MODEL_ABSFINAL_T *const ABSFINAL_M = &ABSFINAL_M_;
/* Model step function */
void ABSFINAL_step(void)
{
int32_T tmp_0;
/* Outputs for Atomic SubSystem: '<Root>/Subsystem' */
/* Outputs for Atomic SubSystem: '<S1>/Subsystem12' */
/* Switch: '<S3>/Switch' incorporates:
* Constant: '<S21>/Constant'
* Constant: '<S22>/Constant'
* Constant: '<S23>/Constant'
* Constant: '<S24>/Constant'
* Constant: '<S25>/Constant'
* Constant: '<S26>/Constant'
* Constant: '<S27>/Constant'
* Constant: '<S28>/Constant'
* Constant: '<S29>/Constant'
* Constant: '<S30>/Constant'
* Constant: '<S31>/Constant'
* Constant: '<S32>/Constant'
* Constant: '<S33>/Constant'
* Constant: '<S34>/Constant'
* Constant: '<S35>/Constant'
* Constant: '<S36>/Constant'
* Constant: '<S37>/Constant'
* Constant: '<S38>/Constant'
* Constant: '<S39>/Constant'
* Constant: '<S3>/Constant'
* Constant: '<S3>/Constant4'
* Constant: '<S40>/Constant'
* Constant: '<S41>/Constant'
* Constant: '<S42>/Constant'
* Constant: '<S43>/Constant'
* Constant: '<S44>/Constant'
* Constant: '<S45>/Constant'
* Constant: '<S46>/Constant'
* Constant: '<S47>/Constant'
* Constant: '<S48>/Constant'
* Constant: '<S49>/Constant'
* Constant: '<S50>/Constant'
* Constant: '<S51>/Constant'
* Constant: '<S52>/Constant'
* Constant: '<S53>/Constant'
* Constant: '<S54>/Constant'
* Constant: '<S55>/Constant'
* Constant: '<S56>/Constant'
* Constant: '<S57>/Constant'
* Constant: '<S58>/Constant'
* Constant: '<S59>/Constant'
* Constant: '<S60>/Constant'
* Constant: '<S61>/Constant'
* Constant: '<S62>/Constant'
* Constant: '<S63>/Constant'
* Constant: '<S64>/Constant'
* Inport: '<Root>/FL'
* Inport: '<Root>/FR'
* Inport: '<Root>/RL'
* Inport: '<Root>/RR'
* Logic: '<S3>/Logical Operator'
* Logic: '<S3>/Logical Operator1'
* Logic: '<S3>/Logical Operator10'
* Logic: '<S3>/Logical Operator11'
* Logic: '<S3>/Logical Operator12'
* Logic: '<S3>/Logical Operator13'
* Logic: '<S3>/Logical Operator14'
* Logic: '<S3>/Logical Operator15'
* Logic: '<S3>/Logical Operator16'
* Logic: '<S3>/Logical Operator17'
* Logic: '<S3>/Logical Operator18'
* Logic: '<S3>/Logical Operator19'
* Logic: '<S3>/Logical Operator2'
* Logic: '<S3>/Logical Operator20'
* Logic: '<S3>/Logical Operator3'
* Logic: '<S3>/Logical Operator4'
* Logic: '<S3>/Logical Operator5'
* Logic: '<S3>/Logical Operator6'
* Logic: '<S3>/Logical Operator7'
* Logic: '<S3>/Logical Operator8'
* Logic: '<S3>/Logical Operator9'
* RelationalOperator: '<S15>/Compare'
* RelationalOperator: '<S16>/Compare'
* RelationalOperator: '<S17>/Compare'
* RelationalOperator: '<S18>/Compare'
* RelationalOperator: '<S19>/Compare'
* RelationalOperator: '<S20>/Compare'
* RelationalOperator: '<S21>/Compare'
* RelationalOperator: '<S22>/Compare'
* RelationalOperator: '<S23>/Compare'
* RelationalOperator: '<S24>/Compare'
* RelationalOperator: '<S25>/Compare'
* RelationalOperator: '<S26>/Compare'
* RelationalOperator: '<S27>/Compare'
* RelationalOperator: '<S28>/Compare'
* RelationalOperator: '<S29>/Compare'
* RelationalOperator: '<S30>/Compare'
* RelationalOperator: '<S31>/Compare'
* RelationalOperator: '<S32>/Compare'
* RelationalOperator: '<S33>/Compare'
* RelationalOperator: '<S34>/Compare'
* RelationalOperator: '<S35>/Compare'
* RelationalOperator: '<S36>/Compare'
* RelationalOperator: '<S37>/Compare'
* RelationalOperator: '<S38>/Compare'
* RelationalOperator: '<S39>/Compare'
* RelationalOperator: '<S40>/Compare'
* RelationalOperator: '<S41>/Compare'
* RelationalOperator: '<S42>/Compare'
* RelationalOperator: '<S43>/Compare'
* RelationalOperator: '<S44>/Compare'
* RelationalOperator: '<S45>/Compare'
* RelationalOperator: '<S46>/Compare'
* RelationalOperator: '<S47>/Compare'
* RelationalOperator: '<S48>/Compare'
* RelationalOperator: '<S49>/Compare'
* RelationalOperator: '<S50>/Compare'
* RelationalOperator: '<S51>/Compare'
* RelationalOperator: '<S52>/Compare'
* RelationalOperator: '<S53>/Compare'
* RelationalOperator: '<S54>/Compare'
* RelationalOperator: '<S55>/Compare'
* RelationalOperator: '<S56>/Compare'
* RelationalOperator: '<S57>/Compare'
* RelationalOperator: '<S58>/Compare'
* RelationalOperator: '<S59>/Compare'
* RelationalOperator: '<S60>/Compare'
* RelationalOperator: '<S61>/Compare'
* RelationalOperator: '<S62>/Compare'
* RelationalOperator: '<S63>/Compare'
* RelationalOperator: '<S64>/Compare'
* Switch: '<S3>/Switch1'
* Switch: '<S3>/Switch10'
* Switch: '<S3>/Switch2'
* Switch: '<S3>/Switch3'
* Switch: '<S3>/Switch4'
* Switch: '<S3>/Switch5'
* Switch: '<S3>/Switch6'
* Switch: '<S3>/Switch7'
* Switch: '<S3>/Switch8'
* Switch: '<S3>/Switch9'
*/
if ((FR > 0) && (FL > 0) && (RR > 0) && (RL > 0)) {
tmp_0 = 1;
} else if ((FR == 0) && ((FL > 0) && (RR > 0) && (RL > 0))) {
/* Switch: '<S3>/Switch1' incorporates:
* Constant: '<S3>/Constant1'
*/
tmp_0 = 2;
} else if ((FL == 0) && ((FR > 0) && (RR > 0) && (RL > 0))) {
/* Switch: '<S3>/Switch2' incorporates:
* Constant: '<S3>/Constant2'
* Switch: '<S3>/Switch1'
*/
tmp_0 = 3;
} else if ((RR == 0) && ((FR > 0) && (FL > 0) && (RL > 0))) {
/* Switch: '<S3>/Switch3' incorporates:
* Constant: '<S3>/Constant3'
* Switch: '<S3>/Switch1'
* Switch: '<S3>/Switch2'
*/
tmp_0 = 4;
} else if ((RL == 0) && ((FR > 0) && (FL > 0) && (RR > 0))) {
/* Switch: '<S3>/Switch4' incorporates:
* Constant: '<S3>/Constant8'
* Switch: '<S3>/Switch1'
* Switch: '<S3>/Switch2'
* Switch: '<S3>/Switch3'
*/
tmp_0 = 5;
} else if ((RR == 0) && (RL == 0) && ((FR > 0) && (FL > 0))) {
/* Switch: '<S3>/Switch5' incorporates:
* Constant: '<S3>/Constant9'
* Switch: '<S3>/Switch1'
* Switch: '<S3>/Switch2'
* Switch: '<S3>/Switch3'
* Switch: '<S3>/Switch4'
*/
tmp_0 = 6;
} else if ((RL == 0) && (FR == 0) && ((RR > 0) && (FL > 0))) {
/* Switch: '<S3>/Switch6' incorporates:
* Constant: '<S3>/Constant10'
* Switch: '<S3>/Switch1'
* Switch: '<S3>/Switch2'
* Switch: '<S3>/Switch3'
* Switch: '<S3>/Switch4'
* Switch: '<S3>/Switch5'
*/
tmp_0 = 7;
} else if ((RR == 0) && (FR == 0) && ((RL > 0) && (FL > 0))) {
/* Switch: '<S3>/Switch7' incorporates:
* Constant: '<S3>/Constant11'
* Switch: '<S3>/Switch1'
* Switch: '<S3>/Switch2'
* Switch: '<S3>/Switch3'
* Switch: '<S3>/Switch4'
* Switch: '<S3>/Switch5'
* Switch: '<S3>/Switch6'
*/
tmp_0 = 8;
} else if ((RR == 0) && (FL == 0) && ((FR > 0) && (RL > 0))) {
/* Switch: '<S3>/Switch8' incorporates:
* Constant: '<S3>/Constant14'
* Switch: '<S3>/Switch1'
* Switch: '<S3>/Switch2'
* Switch: '<S3>/Switch3'
* Switch: '<S3>/Switch4'
* Switch: '<S3>/Switch5'
* Switch: '<S3>/Switch6'
* Switch: '<S3>/Switch7'
*/
tmp_0 = 9;
} else if ((RL == 0) && (FL == 0) && ((RR > 0) && (FR > 0))) {
/* Switch: '<S3>/Switch9' incorporates:
* Constant: '<S3>/Constant12'
* Switch: '<S3>/Switch1'
* Switch: '<S3>/Switch2'
* Switch: '<S3>/Switch3'
* Switch: '<S3>/Switch4'
* Switch: '<S3>/Switch5'
* Switch: '<S3>/Switch6'
* Switch: '<S3>/Switch7'
* Switch: '<S3>/Switch8'
*/
tmp_0 = 10;
} else if ((FL == 0) && (FR == 0) && ((RL > 0) && (RR > 0))) {
/* Switch: '<S3>/Switch10' incorporates:
* Constant: '<S3>/Constant13'
* Switch: '<S3>/Switch1'
* Switch: '<S3>/Switch2'
* Switch: '<S3>/Switch3'
* Switch: '<S3>/Switch4'
* Switch: '<S3>/Switch5'
* Switch: '<S3>/Switch6'
* Switch: '<S3>/Switch7'
* Switch: '<S3>/Switch8'
* Switch: '<S3>/Switch9'
*/
tmp_0 = 11;
} else {
tmp_0 = 12;
}
/* End of Switch: '<S3>/Switch' */
/* MultiPortSwitch: '<S2>/Multiport Switch' */
switch (tmp_0) {
case 1:
{
uint32_T tmp;
/* Sum: '<S4>/Add' incorporates:
* Inport: '<Root>/FL'
* Inport: '<Root>/FR'
* Inport: '<Root>/RL'
* Inport: '<Root>/RR'
*/
tmp = (uint32_T)FR + FL;
if (tmp > 65535U) {
tmp = 65535U;
}
tmp += RR;
if (tmp > 65535U) {
tmp = 65535U;
}
tmp += RL;
if (tmp > 65535U) {
tmp = 65535U;
}
/* Gain: '<S4>/Gain' incorporates:
* Sum: '<S4>/Add'
*/
Speed = (uint16_T)(tmp >> 2);
if (Speed > 127) {
Speed = 127U;
}
}
break;
case 2:
{
uint32_T tmp;
/* Sum: '<S7>/Add' incorporates:
* Inport: '<Root>/FL'
* Inport: '<Root>/RL'
* Inport: '<Root>/RR'
*/
tmp = ((uint32_T)FL + RR) + RL;
if (tmp > 65535U) {
tmp = 65535U;
}
/* Gain: '<S4>/Gain' incorporates:
* Gain: '<S7>/Gain'
* MultiPortSwitch: '<S2>/Multiport Switch'
* Sum: '<S7>/Add'
*/
Speed = (uint16_T)((43691U * tmp) >> 17);
}
break;
case 3:
{
uint32_T tmp;
/* Sum: '<S8>/Add' incorporates:
* Inport: '<Root>/FR'
* Inport: '<Root>/RL'
* Inport: '<Root>/RR'
*/
tmp = ((uint32_T)FR + RR) + RL;
if (tmp > 65535U) {
tmp = 65535U;
}
/* Gain: '<S8>/Gain' incorporates:
* Sum: '<S8>/Add'
*/
tmp_0 = (int32_T)((43691U * tmp) >> 17);
if ((uint32_T)tmp_0 > 127U) {
tmp_0 = 127;
}
/* Gain: '<S4>/Gain' incorporates:
* Gain: '<S8>/Gain'
* MultiPortSwitch: '<S2>/Multiport Switch'
*/
Speed = (uint16_T)tmp_0;
}
break;
case 4:
{
uint32_T tmp;
/* Sum: '<S9>/Add' incorporates:
* Inport: '<Root>/FL'
* Inport: '<Root>/FR'
* Inport: '<Root>/RL'
*/
tmp = ((uint32_T)FR + FL) + RL;
if (tmp > 65535U) {
tmp = 65535U;
}
/* Gain: '<S9>/Gain' incorporates:
* Sum: '<S9>/Add'
*/
tmp_0 = (int32_T)((43691U * tmp) >> 17);
if ((uint32_T)tmp_0 > 127U) {
tmp_0 = 127;
}
/* Gain: '<S4>/Gain' incorporates:
* Gain: '<S9>/Gain'
* MultiPortSwitch: '<S2>/Multiport Switch'
*/
Speed = (uint16_T)tmp_0;
}
break;
case 5:
{
uint32_T tmp;
/* Sum: '<S10>/Add' incorporates:
* Inport: '<Root>/FL'
* Inport: '<Root>/FR'
* Inport: '<Root>/RR'
*/
tmp = ((uint32_T)FR + FL) + RR;
if (tmp > 65535U) {
tmp = 65535U;
}
/* Gain: '<S10>/Gain' incorporates:
* Sum: '<S10>/Add'
*/
tmp_0 = (int32_T)((43691U * tmp) >> 17);
if ((uint32_T)tmp_0 > 127U) {
tmp_0 = 127;
}
/* Gain: '<S4>/Gain' incorporates:
* Gain: '<S10>/Gain'
* MultiPortSwitch: '<S2>/Multiport Switch'
*/
Speed = (uint16_T)tmp_0;
}
break;
case 6:
{
uint32_T tmp;
/* Sum: '<S11>/Add' incorporates:
* Inport: '<Root>/FL'
* Inport: '<Root>/FR'
*/
tmp = (uint32_T)FR + FL;
if (tmp > 65535U) {
tmp = 65535U;
}
/* Gain: '<S4>/Gain' incorporates:
* Gain: '<S11>/Gain'
* Sum: '<S11>/Add'
*/
Speed = (uint16_T)(tmp >> 1);
/* Gain: '<S11>/Gain' */
if (Speed > 127) {
/* Gain: '<S4>/Gain' */
Speed = 127U;
}
}
break;
case 7:
{
uint32_T tmp;
/* Sum: '<S12>/Add' incorporates:
* Inport: '<Root>/FL'
* Inport: '<Root>/RR'
*/
tmp = (uint32_T)RR + FL;
if (tmp > 65535U) {
tmp = 65535U;
}
/* Gain: '<S4>/Gain' incorporates:
* Gain: '<S12>/Gain'
* Sum: '<S12>/Add'
*/
Speed = (uint16_T)(tmp >> 1);
/* Gain: '<S12>/Gain' */
if (Speed > 127) {
/* Gain: '<S4>/Gain' */
Speed = 127U;
}
}
break;
case 8:
{
uint32_T tmp;
/* Sum: '<S13>/Add' incorporates:
* Inport: '<Root>/FL'
* Inport: '<Root>/RL'
*/
tmp = (uint32_T)RL + FL;
if (tmp > 65535U) {
tmp = 65535U;
}
/* Gain: '<S4>/Gain' incorporates:
* Gain: '<S13>/Gain'
* Sum: '<S13>/Add'
*/
Speed = (uint16_T)(tmp >> 1);
/* Gain: '<S13>/Gain' */
if (Speed > 127) {
/* Gain: '<S4>/Gain' */
Speed = 127U;
}
}
break;
case 9:
{
uint32_T tmp;
/* Sum: '<S14>/Add' incorporates:
* Inport: '<Root>/FR'
* Inport: '<Root>/RL'
*/
tmp = (uint32_T)FR + RL;
if (tmp > 65535U) {
tmp = 65535U;
}
/* Gain: '<S4>/Gain' incorporates:
* Gain: '<S14>/Gain'
* Sum: '<S14>/Add'
*/
Speed = (uint16_T)(tmp >> 1);
/* Gain: '<S14>/Gain' */
if (Speed > 127) {
/* Gain: '<S4>/Gain' */
Speed = 127U;
}
}
break;
case 10:
{
uint32_T tmp;
/* Sum: '<S5>/Add' incorporates:
* Inport: '<Root>/FR'
* Inport: '<Root>/RR'
*/
tmp = (uint32_T)RR + FR;
if (tmp > 65535U) {
tmp = 65535U;
}
/* Gain: '<S4>/Gain' incorporates:
* Gain: '<S5>/Gain'
* Sum: '<S5>/Add'
*/
Speed = (uint16_T)(tmp >> 1);
/* Gain: '<S5>/Gain' */
if (Speed > 127) {
/* Gain: '<S4>/Gain' */
Speed = 127U;
}
}
break;
case 11:
{
uint32_T tmp;
/* Sum: '<S6>/Add' incorporates:
* Inport: '<Root>/RL'
* Inport: '<Root>/RR'
*/
tmp = (uint32_T)RL + RR;
if (tmp > 65535U) {
tmp = 65535U;
}
/* Gain: '<S4>/Gain' incorporates:
* Gain: '<S6>/Gain'
* Sum: '<S6>/Add'
*/
Speed = (uint16_T)(tmp >> 1);
/* Gain: '<S6>/Gain' */
if (Speed > 127) {
/* Gain: '<S4>/Gain' */
Speed = 127U;
}
}
break;
default:
/* Gain: '<S4>/Gain' incorporates:
* Constant: '<S2>/Constant'
* MultiPortSwitch: '<S2>/Multiport Switch'
*/
Speed = 0U;
break;
}
/* End of MultiPortSwitch: '<S2>/Multiport Switch' */
/* End of Outputs for SubSystem: '<S1>/Subsystem12' */
/* End of Outputs for SubSystem: '<Root>/Subsystem' */
}
/* Model initialize function */
void ABSFINAL_initialize(void)
{
/* (no initialization code required) */
}
/* Model terminate function */
void ABSFINAL_terminate(void)
{
/* (no terminate code required) */
}
/*
* File trailer for generated code.
*
* [EOF]
*/
Note: Polyspace test accessability not available in this version.